Introduction to DDC and EDID information

1. Introduction: DDC is a bus standard for communication between the display and the host computer. Its full name is: DISPLAY DATA CHNNEL. Its basic function is to display the electronic file information of the display, such as the range of the field frequency, manufacturer, date of manufacture, product serial number, product model, standard display mode and its parameters, supported DDC standard categories, EDID Version information and more. The high version of the DDC standard bus also allows the host computer to directly adjust the basic parameters of the display, such as brightness, contrast, line size, line center position, color temperature parameters, and more.

2. DDC bus standard category:

1) DDC1: One-way transmission, CLOCKED BY VSYNC, only transmits 128 BYTE EDID standard data information.

2) DDC2B: One-way transmission (address: 0xA0/A1), is a simple standard I2C protocol for reading data information from memory, from the display to the host computer.

3) DDC2Bi: bidirectional transmission, I2C SLAVE MODE, transmitting graphic information (address: 0x6E/6F, 0x50/51), supporting simple ACCESS.BUS bus standard.

4) DDC2B+: Bidirectional transmission, point-to-point, does not support ACCESS.BUS, transmits EDID/VDIF standard data information (address: 0x6E/6F, 0x50/51).

5) DDC2AB: Two-way transmission, support ACCESS.BUS, transmit EDID/VDIF standard data information (address: 0x6E/6F, 0x50/51).

3. EDID data standard: EDID (Extended Display Identification Data Standard) is the standard data information that the display transmits to the host computer through DDC. It has been released to the third version, namely EDID Version 3, which has EDID Version 1.0, Revision 0, EDID Version respectively. 1, Revision 1, EDID Version 2, Revision 0, EDID Version 2, Revision 1 and other versions. According to the amount of data information, EDID is divided into 128 BYTE and 256 BYTE. In the future, there may be more data information in the new version of EDID.

EDID (Extended Display Identification Data Standard) is the standard data information that the display transmits to the host computer through the DDC. EDID is divided into 128 BYTE and 256 BYTE

EDID data format:

00–07: Header information

08–17: Complete serial number

08–09: Manufacturer ID

10–11: Product ID Code (little-endian)

12–15: Serial Number (little-endian)

16: Week of Manufacture

17: Year of Manufacture. Add 1990 to the value for actual year.

18: EDID Version Number

19: EDID Revision Number

20-24: Basic Display Parameters

20: VIDEO INPUT DEFINITION

bit 7: 0=analog, 1=digital

if bit 7 is digital:

bit 0: 1=DFP 1.x compatible

if bit 7 is analog:

bit 6-5: video level

00=0.7, 0.3, 01=0.714, 0.286, 10=1, .4 11=0.7, 0

bit 4: blank-to-black setup

bit 3: separate syncs

bit 2: composite sync

bit 1: sync on green bit 0: serration vsync

21: Maximum Horizontal Image Size (in centimeters).

22: Maximum Vertical Image Size (in centimetres).

23: Display Gamma. Divide by 100, then add 1 for actual value.

24: Power Management and Supported Feature(s):

bit 7: standby

bit 6: suspend

bit 5: active-off/low power

bit 4-3: display type. 00=monochrome, 01=RGB colour, 10=non RGB multicolour, 11=undefined

bit 2: standard colour space

bit 1: preferred timing mode

bit 0: default GTF supported

25-34: CHROMA INFO

25: low significant bits for Red X (bit 7-6), Red Y (bit 5-4), Green X (bit 3-2), Green Y (bit 1-0).

26: low significant bits for Blue X (bit 7-6), Blue Y (bit 5-4), White X (bit 3-2), White Y (bit 1-0).

27–34: high significant bits for Red X, Red Y, Green X, Green Y, Blue X, Blue Y, White X, White Y.

To decode actual value, rearrange bits as follows:

High significant bits 7-0 for (channel), low significant bits for (channel).

Actual value is between 0.000 and 0.999, but encoded value is between 000h and 3FFh.

35: ESTABLISHED TIMING I

bit 7-0: 720×400@70 Hz, 720×400@88 Hz,640×480@60 Hz, 640×480@67 Hz,

640×480@72 Hz, 640×480@75 Hz, 800×600@56 Hz, 800×600@60 Hz

36: ESTABLISHED TIMING II

bit 7-0: 800×600@72 Hz, 800×600@75 Hz, 832×624@75 Hz, 1024×768@87 Hz (Interlaced),

1024×768@60 Hz, 1024×768@70 Hz, 1024×768@75 Hz, 1280×1024@75 Hz

37: Manufacturer's Reserved Timing

38–53: Standard Timing Identification. 2 bytes for each record.

First byte

Horizontal resolution. Multiply by 8, then add 248 for actual value.

Second byte

bit 7-6: Aspect ratio. Actual vertical resolution depends on horizontal resolution.

00=16:10, 01=4:3, 10=5:4, 11=16:9

bit 5-0: Vertical frequency. Adds 60 to get actual value.

54–71: Desc riptor Block 1

54–55: Pixel Clock (in 10 kHz) or 0 If Pixel Clock is non null: 56: Horizontal Active (in pixels)

57: Horizontal Blanking (in pixels)

58: Horizontal Active high (4 upper bits) Horizontal Blanking high (4 lower bits) 59: Vertical Active (in pixels)

60: Vertical Blanking (in vertical pixels/lines)

61: high significant bits for Vertical Active (4 upper bits) high significant bits for Vertical Blanking (4 lower bits)

62: Horizontal Sync Offset (in pixels)

63: Horizontal Sync Pulse Width (in pixels)

64: Vertical Sync Offset (in lines) (4 upper bits) Vertical Sync Pulse Width (in lines) (4 lower bits)

65: high significant bits for Horizontal Sync Offset (bit 7-6)

high significant bits for Horizontal Sync Pulse Width (bit 5-4)

high significant bits for Vertical Sync Offset (bit 3-2)

high significant bits for Vertical Sync Pulse Width (bit 1-0)

66: Horizontal Image Size (in mm)

67: Vertical Image Size (in mm)

68: high significant bits for Horizontal Image Size (4 upper bits)

high significant bits for Vertical Image Size (4 lower bits)

69: Horizontal Border

70: Vertical Border

71: Interlaced or not (bit 7)

Stereo or not (bit 6-5) ("00" means not)

Separate Sync or not (bit 4-3)

Horizontal Sync positive or not (bit 2)

Vertical Sync positive or not (bit 1)

Stereo Mode (bit 0) (unused if 6-5 are 00)

If Pixel Clock is null:

56: 0

57: Block type FFh=Monitor Serial Number, FEh=ASCII string, FDh=Monitor Range Limits, FCh=Monitor name,

FBh=Colour Point Data, FAh, Standard Timing Data,

F9h=Currently undefined,

F8h=defined by manufacturer

58: Unknown

59–71: Desc riptor block contents. If block type is FFh, FEh, or FCh, the entire area is a text string.

If block type is FDh:

59–63: Min Vertical frequency, Max Vertical frequency,

Min Horizontal frequency (in kHz),

Max Horizontal frequency (in kHz), pixel clock (in MHz (multiply by 10 for actual value))

64–65: Secondary GTF toggle If encoded value is 000A, bytes

59-63 are used. If encoded value is 0200, bytes

67–71 are used.

66: Start horizontal frequency (in kHz).

Multiply by 2 for actual value.

67: C. Divide by 2 for actual value.

68-69: M (little endian).

70: K

71: J. Divide by 2 for actual value. If block type is FBh:

59: W Index 0. If set to 0, bytes

60-63 are not used. If set to 1,

61–63 are assigned to white point index #1

64: W Index 1. If set to 0, bytes

65-68 are not used. If set to 2,

65–68 are assigned to white point index #2 White point index structure:

First byte bit 3-2:

low significant bits for White X (bit 3-2),

White Y (bit 1-0) Second to third byte: high significant bits for White X, White Y.

Fourth byte: Gamma. Divide by 100, then add 1 for actual value.

To decode White X and White Y, see bytes

25-34. If block type is FAh:

59–70: Standard Timing Identification.

2 bytes for each record. For structure details, see bytes

38-53.

72–89: Desc riptor Block 2

90–107: Desc riptor Block 3

108–125: Desc riptor Block 4

126: Extension EDID Block(s).

In EDID 1.1, it is ignored, and should be set to 0.

127: Checksum.